TSMC Clarifies Apple's UltraFusion Chip-to-Chip Interconnect

TSMC Clarifies Apple’s UltraFusion Chip-to-Chip Interconnect

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TSMC recently confirmed that Apple used its InFO_LI packaging method to build its M1 Ultra processor and enable its UltraFusion chip-to-chip interconnect. Apple is one of the first companies to use InFO_LI technology. 

When Apple introduced its 20-core M1 Ultra processor earlier this year, it impressed observers with its UltraFusion 2.5 TB/s inter-processor interconnect and made us wonder what kind of packaging technology it used. Since Apple uses TSMC’s chip production services, it was reasonable to assume that it used one of TSMC’s packaging technologies too.  

(Image credit: TSMC/Tom Wassick/Twitter)

Back in March, a rumor suggested that Apple opted to use TSMC’s CoWoS-S (chip-on-wafer-on-substrate with silicon interposer) 2.5D interposer-based packaging, which is pretty much a proven technology used by a number of companies. Apparently, this is not correct. According to a presentation demonstrated by the foundry at the International Symposium on 3D IC and Heterogeneous Integration, Apple uses Integrated Fan-Out (InFO) with local silicon interconnect (LSI) and a redistribution layer (RDL). The slide was republished by Tom Wassick, a semiconductor packaging engineering professional.

(Image credit: TSMC)

Ultimately, Apple’s UltraFusion chip-to-chip interconnect uses a passive silicon bridge that connects one M1 Max to another M1 Max processor to build an M1 Ultra, but there are several ways to implement such a bridge. InFO_LI uses localized silicon interconnects beneath multiple dies instead of large and costly interposers, which is a concept that is very similar to Intel’s embedded die interconnect bridge (EMIB).  

(Image credit: TSMC)

By contrast, CoWoS-S uses an expensive interposer, so unless a very ‘broad’ interconnect is needed (which is required for multi-chiplet + HBM memory integration), InFO is a preferable technology from a cost perspective. Meanwhile, since Apple does not use HBM memory and does not need to integrate two or more dies that are larger than interposer, InFO is more than enough for M1 Ultra. 





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