The PCI-SIG Developers Conference 2022 is in full swing, and today the standards committee behind the ubiquitous PCIe interface announced that the PCIe 7.0 specification is targeted for release to its members in 2025 with a data rate up to 128 GT/s (before encoding overhead). That will equate to 512 GB/s of bi-directional throughput via a 16-lane (x16) connection. As a reminder, the PCI-SIG is the consortium behind the PCIe interface, which is an open industry standard that comprises over 900 member companies.
The new PCIe 7.0 specification comes after the PCI-SIG finalized the PCIe 6.0 specification earlier this year and will provide a doubling of bandwidth over the prior-gen interface. As you’ll notice, there still aren’t many PCIe 5.0 devices on the market, though the interface did come to mainstream motherboards with the arrival of Intel’s Alder Lake and will also make an appearance on AMD’s upcoming Zen 4 Ryzen 7000 platform that arrives later this year.
PCIe 6.0 devices began coming to market in April from Renesas, but it will still be some time for
The PCI-SIG announcement had a very short NDA window, so we’re busy adding some additional information to this article. For now, here are the bullet points from the press release:
- PCIe 7.0 Specification Goals:
- Delivering 128 GT/s raw bit rate and up to 512 GB/s bi-directionally via x16 configuration
- Utilizing PAM4 (Pulse Amplitude Modulation with 4 levels) signaling
- Focusing on the channel parameters and reach
- Continuing to deliver the low-latency and high-reliability targets
- Improving power efficiency
- Maintaining backwards compatibility with all previous generations of PCIe technology
Here’s the full press deck for your perusal.
This is breaking news…we’ll add some additional commentary shortly.